CKE merged 194 pull requests and 466 commits during July. The useful story is not the volume. It is how the work connected: Qwen3-VL numerical debugging forced us to make circuits, kernel maps, runtime provenance and X-Ray more explicit. Those changes then made it easier to add Whisper audio, harden hybrid language models, and optimize Qwen3.6 without guessing which computation we had actually made faster.
C-Kernel-Engine (CKE) is an open-source CPU runtime and kernel compiler for transformer-based language, vision and audio models. It describes a model as mathematical circuits, resolves those operations against explicit kernel contracts, and generates C that can be inspected and compared with reference implementations such as PyTorch, llama.cpp and whisper.cpp.
July was the first month where that idea began to look like one system rather than several separate experiments. Vision, language and audio still have different model contracts, but they now pass through more of the same compiler, evidence and regression machinery.
- Language: Qwen3.6-27B GGUF recurrent/full-attention bring-up, stronger Qwen3.5 DeltaNet parity, GLM-4 production chat formatting and decode X-Ray, and Kimi decoder plus custom-tokenizer contracts. Read the Qwen3.5 architecture, Qwen3.6 X-Ray investigation, Qwen3.6 performance work, GLM-4 bring-up, and Kimi K3 architecture.
- Vision: Qwen3-VL preprocessing, M-RoPE, segmented vision/text prefill, BF16 execution contracts, corpus attribution and exact llama.cpp-backed production providers. The closest July companions are the numerical-parity investigation and the Gemma4-VL vision path.
- Audio: Whisper Tiny, Base and Small through a generated log-Mel frontend, encoder and decoder, with exact timestamp and sequential long-form fixtures. Read How Audio Transformers Work and Whisper Tiny End To End On CKE.
- Existing dense families: Qwen2, Qwen3, Gemma3, Gemma4 and Llama-style circuits remained in the cross-family regression matrix while shared compiler and kernel behavior changed. The Gemma4 circuit, GGUF, and K-Quants posts provide the architecture and storage background.
- Runtime surface: an experimental Responses schema established request, response and streaming shapes, while explicitly remaining separate from production inference.
“Active” has different strengths here. Some families run end to end on named artifacts. Some have exact primitive and stitched-model gates. Others are still bring-up or diagnostic contracts. The article keeps those evidence boundaries separate instead of turning every circuit file into a blanket support claim.
This is why CKE compares against pinned llama.cpp and PyTorch oracles at several scales. A reduction may add the same values in a different order and differ by only one FP32 ULP. BF16 or FP16 storage can round that result before the next operation. Attention, recurrent state and autoregressive decode then reuse earlier outputs, so a tiny early difference can remain harmless, grow gradually, change a logit ranking, or eventually flip a token. A 100,000-token context makes that accumulation question more important, not less.
CKE therefore records a spectrum of evidence: byte-exact leaf providers, exact production-route replay, first non-exact checkpoints, maximum and RMS drift, top-1 agreement, recurrent-state equality, and multi-token or long-context behavior. X-Ray exists to walk backward from a later behavioral difference to the first circuit where the two executions stopped matching.
What Actually Merged In July?
Using the Pacific-time month boundary, CKE merged 194 pull requests and 466 commits to main. Two GitHub contributors are represented in the merged PR authorship: Anthony Shivakumar and Aaditya Anand. Commit identity counts are larger because the repository also records separate human, GitHub noreply and managed Xeon-agent identities.
A title-based audit found 50 vision-related PRs, 20 audio-related PRs, 51 mentioning numerical parity, X-Ray or reference oracles, 41 performance-related PRs, and 34 involving DSL, circuit, code-generation or kernel-contract work. These groups overlap. A Qwen3-VL change can be vision, numerical and compiler work at the same time, which is precisely why the total should not be read as five separate piles.
From Text To Vision And Audio
CKE did not simply add a list of model names. July expanded the kinds of circuits the compiler can represent and test.
| Area | July work | Evidence boundary |
|---|---|---|
| Vision | Qwen3-VL image preprocessing, M-RoPE, segmented prefill, BF16 semantics, vision attention and multimodal decode | Production providers and staged parity were hardened against pinned llama.cpp and PyTorch paths; certification remains specific to recorded corpora, ISAs and dtypes. |
| Dense text | Qwen2, Qwen3, Gemma3 and Llama-style circuits continued through the shared compiler path | The compatibility atlas describes contract-level support; it does not claim every quantization on every CPU. |
| Hybrid text | Qwen3.5 DeltaNet/full-attention parity and Qwen3.6-27B recurrent execution, grouped Q/K topology and exact optimized providers | Short production fixtures and primitive gates pass; Qwen3.6 long-context logit accumulation is still under investigation. |
| Other language circuits | GLM-4 chat formatting and decode attribution; Kimi decoder contracts and custom-tokenizer loading | These are model-family bring-up and diagnostic contracts, not a claim of complete frontier-scale Kimi execution. |
| Audio | Generated Whisper log-Mel frontend, encoder, decoder, cross-attention, timestamps and sequential long-form windows | Whisper Tiny, Base and Small run on the FP32 path; exact claims belong to named fixtures. Medium and Large are not certified. |
The audio progression is a good example of the method. Between PR #220 and PR #239, Whisper moved from a log-Mel contract to end-to-end Tiny transcription. Base then reached 25/25 exact generated tokens on the JFK fixture, timestamp decoding produced exact boundaries, and a 33-second fixture reached 81/81 raw generated tokens against Hugging Face. The important part is that the frontend, encoder and decoder are generated through the CKE path rather than hidden behind a framework call.
Making The DSL More Mechanical
The architectural goal is intentionally plain: model-specific knowledge should live in data that the compiler can validate, not in clever branches scattered through generic code generation. PR #144 made circuits authoritative for model dimensions, weight policies, position behavior and required operations. PR #153 moved call-ABI ownership into kernel maps. Later changes made quantization storage, decode providers and checkpoint exports flow from those resolved contracts.
model weights + sidecar + circuit template
|
v
validated GraphIR / LoweredIR
|
v
kernel maps resolve shape + dtype + ABI + arithmetic
|
v
call IR
|
v
generated C
This makes the DSL “dumber” in a useful sense. It should not infer that sliding attention is close enough to full attention, silently choose a family default, or call a kernel because its function name looks plausible. A circuit requests exact semantics. A kernel map advertises an exact implementation. Missing or incompatible information fails closed. The power comes from composing many small, explicit pieces, not from hiding model behavior inside the compiler.
Qwen3-VL made this necessary. Its vision bridge, multidimensional positions, mixed storage and segmented prompt shapes exposed places where a leaf kernel could pass while the assembled model still executed the wrong contract. Once those ownership rules were made explicit, Qwen3.5, Qwen3.6 and Whisper could reuse more of the same lowering and validation machinery.
How The Code Was Different Before July
The earlier code could already generate and run model-specific C, but too much meaning could still be supplied indirectly. Generic compiler paths knew about model-family names. Some operation mappings had defaults or compatibility fallbacks. A kernel could be selected from an operation name without the map owning its complete call ABI, storage policy, reduction behavior and valid shape range. Debugging scripts could also observe a different route or stale runtime without failing the evidence immediately.
| Before the July hardening | What July changed | Why it matters |
|---|---|---|
| Generic compiler and code-generation code could contain family-specific dimensions or behavior. | Circuits and converter-owned sidecars became authoritative, with AST policy tests rejecting protected family dispatch. | A new family should be described through data and validated operations rather than another branch in the compiler. |
| Missing semantics could reach aliases, broad defaults, or compatibility fallbacks. | Ambiguous, missing or incompatible circuit and kernel declarations increasingly fail closed. | A build failure is safer than silently stitching the wrong attention, position or storage contract. |
| A kernel map primarily identified an implementation. | Maps increasingly own call ABI, shape selectors, dtype boundaries, quantization storage, reduction schedule and provider capability. | The compiler can prove that the selected C function implements the operation requested by the circuit. |
| Leaf tests could allocate independent buffers and miss arena interactions in the generated graph. | Lowering, call-IR, generated-runtime and stitched-model tests now exercise memory ownership and production dispatch. | This caught issues such as simultaneously live Whisper scratch tensors receiving the same arena base. |
| Backend-specific parity scripts could order or label failures differently. | X-Ray created one semantic checkpoint order and joined PyTorch or llama.cpp evidence to circuit and call IR. | The first reported divergence follows model execution rather than a filename or dump ordering accident. |
| A rebuilt or diagnostic runtime could be mistaken for the production artifact. | Hashes, compiler identity, ISA, model identity, runtime timestamps and oracle provenance became fail-closed evidence. | A passing report must describe the binary and route that actually ran. |
This is what “making the DSL mechanical” means in practice. The earlier implementation relied on more developer knowledge outside the machine-readable graph. The July implementation moves more of that knowledge into circuits and kernel maps, then makes the compiler reject combinations it cannot justify. The generated C may still be specialized, but the specialization should follow a resolved contract rather than a hidden model-name rule.
How The Tests Became Harder To Fool
Seventy-four July PR titles mention tests, parity, oracles, contracts, provenance, regressions, CI or nightly execution. That category overlaps heavily with the model work. The meaningful change is not that CKE accumulated more test files. It is that each layer of evidence began checking a different way the runtime could be wrong.
- Leaf arithmetic gates. Scalar and vector providers are compared with pinned llama.cpp or PyTorch arithmetic for named shapes, dtypes, thread counts and ISA paths.
- Selector and contract gates. Tests prove that a provider accepts its certified topology and rejects nearby incompatible shapes. The Qwen3.6 rank-48 projection, for example, must not leak into Qwen3.5's rank-16 circuit.
- Call-ABI and lowering gates. Kernel-map arguments, scratch requirements, storage policies and generated call IR must agree before C is emitted.
- Production-route replay. Tests execute the same public dispatch used by the runtime instead of calling only a convenient test function.
- Stitched checkpoints. X-Ray compares semantic stops across a complete layer or model path and identifies the last passing and first divergent operation.
- End-to-end behavior. Text tokens, image-conditioned prefixes, recurrent state, timestamps and transcripts are checked on named model artifacts and fixtures.
- Cross-family regressions. A Qwen3.6 optimization must not silently change Qwen3.5, Gemma, Qwen2, Qwen3, Nanbeige, v7 training or shared runtime behavior.
- Compiler, ISA and thread matrices. GCC and ICX, AVX2 and native Xeon lanes, and 1/16/20/24-thread cases expose contraction, reduction and scheduling differences.
- Provenance and nightly gates. Stale libraries, wrong model hashes, private paths, unowned caches, unsupported hardware and incomplete artifact records fail or report their limits explicitly.
The Q=63 attention failure shows why this layering matters. One compiler-dependent FP32 ULP was found at the final short-prefill boundary. The surrounding provider, shape, storage, threading and oracle identity were already fixed, so the repair could be isolated to an explicit fused multiply-add without changing tolerance or routing. A broad “output is close enough” test could not provide that attribution.
X-Ray Became The Investigation Surface
At the beginning of the month, parity debugging still depended on several backend-specific scripts and tensor dumps. The first Qwen3-VL work established canonical semantic checkpoints and first divergence. PR #164 then put PyTorch and llama.cpp vision evidence behind one X-Ray entry point and ordered results by the model circuit rather than alphabetically by dump filename.
By PR #250, X-Ray reports were joined directly into the IR visualizer. An engineer can inspect the backend, phase, checkpoint drift, call-IR operation, selected provider, required contract and available coverage in one place. Later Qwen3.6 work extended that attribution to prefill schedules and performance timing.
This matters because a wrong token is only the final symptom. The source may be stale generated C, the wrong chat template, a shape-specific provider, a storage conversion, a reduction schedule, recurrent-state ownership or one arithmetic operation. X-Ray first checks whether both backends executed comparable state and inputs. Only then does it assign the first numerical divergence to a circuit location.
The deeper account is in What Numerical Parity Actually Requires and the Qwen3.6 case study, How CKE X-Ray Found Qwen3.6's First Bad Circuit.
Closing Gaps Without Hiding Them
July's performance work concentrated on exact Q4/Q6 providers, packed-weight reuse, query tiling, visual-attention parallelism, recurrent-head ownership, Whisper scheduling and ISA-specific paths. Two end-of-month measurements show both the progress and the remaining work.
Qwen3.6 prefill on one Xeon node
On an Intel Xeon Gold 6542Y, inside a 14-CPU cgroup, the measured Qwen3.6-27B Q4_K_M GGUF 29-token prefill improved from 6,682.61 ms to 2,552.64–2,601.74 ms. Throughput moved from 4.34 to 11.15–11.36 tokens per second, approximately 2.6x faster than the earlier CKE path. The same-host llama.cpp reference measured about 20.7 tokens per second, so CKE remained about 1.85x slower. The optimized route is still opt-in because 1K-context logits retain unresolved accumulated drift even though top-1 remains aligned in the tested run.
Whisper Base changed within two days
The first controlled Whisper benchmark measured CKE at 26.751 seconds of compute against 0.544 seconds for whisper.cpp: a 49.15x gap, despite all three backends producing the same 25 transcript tokens. That baseline isolated generated decoder and attention execution as the real problem.
Subsequent profiling, packed-K attention, persistent-thread scheduling, Conv1D parallelism, oneDNN integration and validated FP16 encoder storage reduced the exact CKE hybrid path to 1.53–1.58 seconds on the same 11-second fixture. The recorded whisper.cpp FP16 result remained faster at 0.567 seconds, roughly a 2.7x gap. This is still one Base fixture, not a broad audio benchmark, but it shows why retaining an honest slow baseline is useful: the same benchmark can prove whether later work changed the actual bottleneck.
The Qwen3.6 sequence is explained in How CKE Made Qwen3.6 Prefill 2.6x Faster.
A Contributor Started The Server Surface
Aaditya's July work covered Arch Linux profiling guidance and the first experimental Responses schema scaffold. PR #183 corrected the Cachegrind setup workflow from a contributor's environment. That led to stronger contributor attribution in CONTRIBUTORS.md, .mailmap and project governance documentation.
PR #272 added an experimental Responses request, response and streaming schema with 56 passing tests. The current implementation returns deterministic mock data; it does not load a CKE model. That is deliberate. The wire contract can be reviewed while the eventual native C or Rust server is designed around one model load, bounded queues, cancellation and streaming from the generation loop.
One Codebase, Several CPU Generations
Most July performance investigation happened on two very different machines. The first is a personally funded CAD 1,050 Lenovo P3 Tiny with a 14th Gen Intel Core i7-14700T and 32 GB of RAM. It is a dedicated minimal Ubuntu Server node for repeatable AVX2/FMA/AVX-VNNI execution, VTune and Advisor profiling, perf, flamegraphs, assembly inspection and unattended experiments. It does not provide native BF16 or AMX, which makes it a useful commodity-CPU baseline rather than a substitute for Xeon evidence.
The second is external access to a 5th Gen Intel Xeon Gold 6542Y inside a Kubernetes environment. The processor exposes 24 physical cores and 48 logical CPUs, AVX-512, VNNI, BF16 and AMX, but the container has a 14-CPU quota. Runs above that quota measure CFS/cgroup throttling as well as kernel work. That constraint is inconvenient, but still valuable: it enabled native Xeon compiler, ISA, BF16 and AMX investigation while forcing the reports to separate physical hardware capability from the resources actually allocated to CKE.
The wider validation range includes older and 12th-generation Core i7 systems, GitHub's AMD x86 runners, external 2nd- and 3rd-generation Xeons, and an Arm-class TI TDA4VM portability lane. These machines do not all run the same model matrix. Together they expose ISA assumptions, compiler contraction, hybrid-core scheduling, thread-capacity limits and portability failures that one workstation would hide.
This is not a claim that every model passes every gate on every machine. The purpose of the fleet is to stop one fast workstation from defining “CPU support.” Provider selection, arithmetic, threading and compiler contraction can change across machines. Each published result therefore needs its model, quantization, CPU, ISA, compiler, thread policy, prompt or tensor shape and reference identity.
The July Writing Record
The engineering program also produced 32 public ShivasNotes articles in July. The writing was not a separate marketing exercise after the code. Each article turned a cluster of PR evidence, model architecture, profiling work or mathematical background into something a human could inspect without reading the complete repository history.
| Writing stream | What July documented |
|---|---|
| Models and modalities | Whisper audio, Gemma4 and Gemma4-VL, Nemotron, Qwen3.5, GLM-4, Kimi K3 and Qwen3.6. |
| Compiler and runtime | Thread and memory pools, K-quants, optimization constraints, GGUF, circuit templates, kernel maps, prefill/decode, memory planning and X-Ray. |
| Numerics and mathematics | Jacobians, cross-entropy, softmax versus softplus, BF16 and quantized parity, reduction order and ISA drift. |
| Profiling and hardware | Linux kernel symbols, CPU PMUs, perf, VTune, Advisor and evidence-backed CPU optimization. |
| Robotics, control and ownership | MOSFET characterization, quadcopter dynamics, sovereign AI incident response and the practical open-model workflow. |
Open all 32 July articles
- July 1: Threadpools And Memory Pools: Why CKE Needs Runtime Ownership For CPU AI Kernels
- July 2: K-Quants Deep Dive: Q4_K, Q5_K, Q6_K, Q8_K And Mixed Dot Products
- July 3: Nemotron Architecture From A C-Kernel-Engine Runtime Perspective
- July 4: DeltaNet vs SSM: Two Fixed-Size Memory Systems Beyond Attention
- July 5: How Audio Transformers Work: The Encoder Path, Whisper, Timestamps, And Why Audio Is Not A VLM Patch
- July 6: How the Jacobian Matrix Works
- July 7: MOSFET DUT Characterization Pipeline: Rebuilding My Drone ESC Work From Measurements
- July 7: DeepSeek-V4 Architecture From Kernels: mHC, CSA, HCA, DSA, and C-Kernel-Engine
- July 8: Amdahl's Law, Theory Of Constraints, And C-Kernel-Engine Optimization
- July 9: GGUF: The File Format That Made Local LLMs Practical
- July 10: Templates Are Circuit Maps: How CKE Describes A Model Family
- July 11: Gemma4 In CKE: Four Attention Paths, Shared KV, And Sliding Windows
- July 12: Gemma4-VL In CKE: How Images Become Decoder Tokens
- July 13: Nemotron Is Not One Circuit: Mamba, Attention, And MoE Routing
- July 14: Nemotron Kernels From Inference To Backpropagation
- July 15: What kernel.kptr_restrict=0 Actually Does: Linux Profiling, Kernel Symbols, VTune And Advisor
- July 16: What Is A CPU PMU? How perf, VTune And Advisor Measure What A Processor Actually Did
- July 17: Where Does LLM Cross-Entropy Loss Come From? Compression, Shannon Entropy And Generalization
- July 18: CKE Kernel Registry: How Exact C Functions And Numerical Contracts Connect
- July 19: Prefill vs Decode in CKE: Why One Model Needs GEMM, GEMV, and Two Execution Plans
- July 20: Qwen3.5 Hybrid Recurrent Attention: How DeltaNet State And Full Attention Share One Decoder
- July 21: GLM4 Bring-Up In CKE: What A New Model Family Actually Requires
- July 22: Softmax vs Softplus: Competition, Positive Gates, and Backpropagation
- July 23: What Numerical Parity Actually Requires: BF16, Quantization, ISA Drift And CKE X-Ray
- July 24: Hugging Face Got Hacked By A Closed Model. A Closed Model Also Refused To Help Fix It.
- July 25: Why I Am Testing Kimi And ChatGPT Together For Real Work
- July 26: Teaching C-Kernel-Engine To Listen: Whisper Tiny, End To End On v8
- July 27: Memory Planning in C-Kernel-Engine
- July 28: Kimi K3 Open Weights: What Is Actually New In Its 2.8-Trillion-Parameter Architecture?
- July 29: How CKE X-Ray Found Qwen3.6's First Bad Circuit
- July 30: Modelling A Quadcopter: From Four Rotor Speeds To Motion
- July 31: How CKE Made Qwen3.6 Prefill 2.6x Faster
Together, the PR ledger and the article ledger show two views of the same month. Pull requests preserve exact implementation and validation history. The articles explain why those changes mattered, how the mathematics connects, and where the remaining evidence boundaries sit.
The Complete July Pull-Request Ledger
The narrative above groups the work by engineering problem. The chronological ledger below keeps the complete source record: every pull request merged during July in the America/Vancouver time zone. Titles are retained because they describe whether the change added a capability, corrected a numerical boundary, improved performance, strengthened tests, or documented an evidence limit.
Open the complete 194-PR July ledger
July 1
- PR #79 — Speed up Qwen3-VL staged OCR bridge
- PR #80 — Advance v8 model coverage, vision OCR, and prefill perf
July 2
- PR #81 — Advance v8 model coverage, vision OCR, and staged prefill fixes
- PR #82 — Harden v8 Qwen3-VL OCR bridge profiling and attention threading
- PR #83 — Harden v8 inference, vision artifacts, and visualizer docs
- PR #84 — Harden v8 vision OCR performance and docs
- PR #85 — Document Qwen3-VL OCR Q4/Q8 speed research
- PR #86 — Add commit knowledge-trail prompt
- PR #87 — Add opt-in Q4 x16 prefill dispatch
July 3
July 4
- PR #90 — perf(v8): add opt-in Qwen3-VL chunked kernels
- PR #91 — perf(v8): add Qwen3-VL OCR speed profile
- PR #92 — perf(v8): add Qwen3-VL OCR speed profile stack
- PR #93 — perf(v8): add Qwen3-VL OCR speed profile stack
- PR #94 — docs(site): clarify CKU model-math throughput
- PR #95 — perf(v8): add qwen3vl qblock8 attention path
- PR #96 — perf(v8): add qwen3vl qblock8 attention path
- PR #97 — perf(v8): cap qwen3vl q6 prefill threads
- PR #98 — docs(site): surface CKU in navigation
- PR #99 — docs(site): add CKU roofline infographic
July 5
- PR #100 — perf(v8): add qwen3vl qblock fast exp path
July 6
- PR #101 — perf(v8): add AVX2 Qwen3-VL parity and f16 path
- PR #103 — chore(dev): harden v7 manifest setup
- PR #102 — fix(v8): match llama qwen-vl image resize preprocessing
- PR #104 — perf(v7): gate packed q4 prefill paths
- PR #105 — Harden v7/v8 local model setup and regression hooks
- PR #106 — perf(v8): improve AVX2 quantized prefill paths
July 7
- PR #107 — perf(v8): improve AVX2 quant prefill and harden Qwen3-VL parity
- PR #109 — perf(build): enable AVX-VNNI host flags
July 8
- PR #108 — perf(build): enable AVX-VNNI host flags
- PR #110 — perf(v8): enable Gemma batched prefill
- PR #111 — perf(v8): record kernel tuning methodology and 4096-context retest
- PR #112 — perf(v8): speed up Gemma3 Q5_1 prefill
- PR #113 — fix(v8/vision): tighten Qwen3-VL position parity
July 9
- PR #114 — fix(v8/qwen3vl): align mrope width and guard fused prefill
- PR #115 — fix(v8/vision): guard Qwen3-VL position parity
- PR #116 — feat(v8/qwen3vl): add stitched parity divergence harness
- PR #117 — fix(v8/qwen3vl): bound stitched parity scratch usage
- PR #118 — fix(v8/qwen3vl): keep stitched logs best-effort under quota pressure
- PR #119 — docs(parity): add stitched divergence harness methodology
- PR #120 — test(v8): add Qwen3-VL BF16 parity guard
July 10
- PR #121 — fix(v8/vision): align Qwen3-VL encoder parity
- PR #122 — fix(v8/parity): report true first decoder divergence
- PR #123 — test(v8): align Qwen3-VL attention diagnostics
- PR #124 — test(attention): guard llama F16 split-KV contract
- PR #125 — fix(test): keep optional ggml oracle out of litmus
- PR #126 — fix(attention): match llama fp16 prefill contract
- PR #128 — docs(site): compile CKU memory placement guidance
- PR #127 — fix(v8/vision): align Qwen3-VL BF16 semantics
- PR #129 — fix(v8): harden Qwen3-VL BF16 mixed prefill
- PR #130 — test(v8): gate Qwen3-VL vision encoder accuracy
- PR #131 — feat(v8): make numerical contracts explicit
- PR #132 — feat(v8): make kernel contracts authoritative
- PR #133 — feat(v8): harden quantized linear numerical contracts
July 11
- PR #135 — test(avx2/quant): add direct llama q4 and q6 oracles
- PR #136 — feat(v8): add numerical execution contracts
- PR #137 — test(llama): add rolling upstream compatibility lane
- PR #138 — refactor(v8/dsl): remove family runtime defaults
- PR #139 — fix(kernels): restore exact Q6_K x Q8_K parity
- PR #140 — fix(v8/vision): match BF16 position storage contract
- PR #141 — fix(nightly): make numerical contracts ISA-stable
- PR #142 — feat(v8): bind Qwen3-VL BF16 M-RoPE capability
- PR #143 — fix(v8): route vision M-RoPE by resolved semantics
- PR #144 — refactor(dsl): make circuits authoritative
- PR #145 — feat(v8): harden BF16 vision numerical contracts
- PR #146 — docs: strengthen project thesis and execution roadmap
- PR #147 — docs(readme): connect ShivasNotes to CKE implementation
- PR #148 — docs(readme): define reference backend roadmap
- PR #149 — docs(readme): explain scaling thesis and CKU
- PR #150 — docs(perf): publish cross-hardware evidence matrix
- PR #152 — feat(v8/vision): add BF16 tiled SDPA contract
July 12
- PR #151 — docs(contact): link CPU AI consulting page
- PR #153 — refactor(v8/dsl): make kernel maps own call ABI
- PR #155 — refactor(v8/codegen): consume resolved Q4 Q6 capabilities
- PR #156 — refactor(v8/codegen): propagate quantization storage capability
- PR #157 — perf(v8/bf16): harden AMX vision projections
- PR #158 — docs(v8): add BF16 AMX evidence handoff
- PR #159 — ci(metadata): require structured content handoffs
- PR #160 — perf(v8/bf16): reuse weights across four vision rows
- PR #161 — refactor(v8/dsl): preserve resolved decode attention providers
- PR #162 — fix(v8/dsl): audit module-level specialization debt
- PR #163 — fix(v8): resolve GGUF vision M-RoPE semantics
- PR #164 — feat(v8/xray): unify llama and PyTorch vision parity
- PR #165 — docs(hardware): publish lab sponsorship program
- PR #166 — docs(hardware): define sponsored eight-channel upgrade
- PR #167 — docs(hardware): add CAD 30K funding milestones
- PR #168 — fix(v8/vision): harden frontend and Q8_K parity
- PR #169 — test(v8): methodically gate Qwen3-VL parity
July 13
- PR #170 — fix(v8): restore ISA-exact nightly contracts
- PR #171 — feat(v8): diagnose execution state before tensor math
July 14
- PR #172 — fix(v8/vision): close two-sample Qwen3-VL parity
- PR #173 — feat(v8): harden parity harness and numerical attribution
- PR #174 — Docs/contributor onboarding
- PR #175 — fix(v8): match llama padded KV reduction schedule
- PR #176 — docs(nav): consolidate specialist links under Architecture
- PR #177 — docs(scaling): preserve and harden the CPU frontier-model thesis
- PR #178 — docs(scaling): separate cluster and internet scaling
- PR #179 — fix(v8): make parity runtime provenance fail closed
- PR #180 — fix(quant): enforce llama packed Q4/Q6 parity
July 15
- PR #181 — fix(qwen3vl): match shape-dependent llama prefill math
- PR #182 — fix(v8/profiling): own perf gate and document IR hub
July 16
- PR #183 — fix(profiling): focus Arch setup guidance
- PR #184 — fix(ci): make optional llama patch drift advisory
- PR #185 — feat(v8): add optional LIKWID profiling
- PR #186 — feat(v8): surface and visualize LIKWID profiles
- PR #187 — fix(v8): close Qwen3-VL production parity contracts
July 17
- PR #188 — fix(v8): close grouped Q8 and split-KV parity gaps
- PR #189 — test(v8): harden production numerical replay gates
July 18
- PR #191 — fix(v8/xeon): make llama RMSNorm arithmetic ISA-independent
- PR #190 — fix(attention): make short-prefill reduction compiler-stable
- PR #192 — fix(v8): fail closed on invalid LIKWID workloads
- PR #193 — fix(v8): report unsupported LIKWID processors honestly
- PR #194 — perf(f16): reuse activations across AVX2 output rows
- PR #196 — perf(attention): route large sequences to wider query tiles
- PR #195 — fix(bench): measure resolved Qwen3-VL attention provider
- PR #197 — perf(v8): reuse packed Q4 weights in exact prefill
- PR #198 — perf(v8): add exact 4M x 8N Q4 prefill provider
- PR #199 — perf(q4k): add exact 8M AVX2 prefill provider
- PR #200 — docs(contrib): preserve community attribution
- PR #201 — perf(v8/q4k): add exact eight-output VNNI prefill provider
- PR #202 — docs(governance): separate contribution rights and licensing
- PR #203 — perf(v8/q4k): add bounded SMT provider capacity
- PR #204 — fix(build): pin parity-certified GCC provenance
July 19
- PR #206 — perf(v8/q6k): promote map-owned wide prefill tiling
- PR #207 — perf(v8/q4k): select VNNI prefill by runtime capability
- PR #208 — perf(v8/attention): parallelize exact visual prefill heads
- PR #209 — fix(nightly): pin exact x86 numerical oracle contracts
- PR #210 — docs(readme): disclose AI-assisted engineering workflow
- PR #211 — fix(profiling): preserve Cachegrind child data
- PR #212 — fix(v8): harden tokenizer and Qwen3.5 numerical parity
- PR #213 — fix(e2e): exclude parity-only GGML oracles
July 20
- PR #215 — fix(v8): certify Qwen3.5 recurrent parity
- PR #216 — fix(v8): make Qwen3-VL BF16 prefill phase-safe
- PR #217 — fix(v8): match padded decode attention scheduling
- PR #218 — fix(v8): make checkpoint exports circuit-owned
- PR #219 — fix(v8): harden Qwen3.5 cache write-through parity
- PR #220 — feat(v8): establish Whisper log-Mel contract
- PR #221 — feat(v8): add contracted audio transformer primitives
- PR #222 — feat(v8): harden audio input and generated encoder IR
July 21
- PR #223 — feat(v8): harden Qwen3-VL BF16 provider X-ray gates
- PR #224 — feat(v8): harden Qwen3-VL BF16 corpus X-ray attribution
- PR #225 — feat(v8): add BF16 attention sensitivity X-ray
- PR #226 — feat(v8): model PyTorch CPU-flash BF16 attention exactly
- PR #227 — feat(bf16): add production-shape PyTorch oneDNN oracle
July 23
- PR #229 — test(v8): harden private Qwen3-VL corpus certification
- PR #230 — feat(bf16): harden Qwen3-VL PyTorch execution contracts
- PR #231 — feat(v8): add private corpus console dashboard
July 24
- PR #232 — fix(v8): restore Qwen3-VL parity across execution lanes
- PR #233 — test(v8): align bridge logits assertion with quantized dispatch
July 25
- PR #234 — feat(v8): lower Whisper encoders into generated C
- PR #235 — fix(v8): harden native nightly numerical contracts
- PR #236 — feat(v8): harden Whisper encoder PyTorch parity
- PR #238 — perf(v8): tune Xeon mixed prefill and add family gates
- PR #237 — feat(v8): execute Whisper Tiny decoder cross-attention
- PR #239 — feat(v8): transcribe Whisper Tiny end to end
- PR #240 — test(v8): promote audio composition contracts nightly
July 26
- PR #241 — perf(v8): cache Whisper encoder cross-attention projections
- PR #242 — fix(nightly): stabilize audio oracle dependencies
- PR #243 — feat(v8): harden Kimi decoder contracts and X-ray
- PR #245 — fix(chat): load custom tokenizers from v8 runtimes
- PR #246 — feat(v8): generate the complete Whisper audio frontend
- PR #244 — docs(site): document v8 Whisper Tiny audio path and per-kernel deep dive
- PR #247 — fix(v8): pin nightly audio and BF16 oracle arithmetic
- PR #248 — feat(v8/qwen): bring up Qwen3.6 27B GGUF contracts
- PR #249 — fix(v8): harden native Xeon validation harness
July 27
- PR #251 — feat(v8/qwen): harden BF16 recurrent PyTorch contracts
- PR #250 — feat(v8): X-Ray parity drift tab in IR visualizer — board, circuit join, runbook
- PR #252 — fix(v8): route Qwen3.6 full attention by BF16 contracts
July 28
- PR #253 — fix(v8): preserve Qwen3.6 BF16 prefill contracts
- PR #254 — fix(v8): restore propagated X-ray attribution
- PR #255 — feat(v8/qwen): bind Q6 recurrent projections
- PR #256 — fix(v8/qwen): bind grouped recurrent QK topology
- PR #257 — fix(v8): stabilize audio GELU and harden GLM decode X-Ray
- PR #258 — fix(v8/glm): make parity evidence provenance-safe
- PR #259 — feat(v8/xray): normalize decoder layer-output sweeps
- PR #260 — fix(v8/runtime): publish provenance-safe runtime bundles
July 29
- PR #263 — feat(v8/qwen36): certify llama-compatible recurrent execution
- PR #262 — fix(v8/glm): match production chat formatting and expose decode drift
- PR #264 — fix(nightly): separate hardware profiles from portable contracts
- PR #265 — fix(v8/xray): align prefill schedule attribution
- PR #266 — perf(v8/qwen36): accelerate recurrent Q4 prefill
- PR #268 — perf(v8/qwen36): reuse Q6 unpack across short rows
- PR #267 — feat(v8/audio): certify Whisper Base end to end
- PR #269 — feat(v8/audio): add exact Whisper timestamp decoding
July 30
- PR #271 — feat(v8/audio): add exact long-form Whisper windows
- PR #270 — fix(v8/numerics): scope ERF GELU oracle contracts
- PR #273 — perf(v8/qwen36): accelerate recurrent prefill projections
- PR #272 — feat(v8/server): add experimental Responses schema scaffold
- PR #274 — feat(v8/audio): add local transcription benchmark
- PR #275 — perf(v8/qwen36): parallelize exact DeltaNet decode
- PR #277 — perf(v8/qwen36): accelerate exact batched prefill
July 31
This ledger is intentionally a source index rather than 194 rewritten summaries. The detailed PR descriptions contain the problem, diagnosis, measured delta, regression guard, limitation and validation commands for each bounded change.
What July Did Not Finish
- Qwen3.6's optimized batched prefill remains opt-in until long-context accumulated drift is attributed.
- CKE still trails llama.cpp on the measured Qwen3.6 prefill and whisper.cpp on the measured Whisper Base fixture.
- Whisper Medium and Large are not certified, and broader audio corpora are still required before FP16 becomes a default policy.
- AVX2 is the broad x86 production baseline; AVX-512, BF16 and AMX claims remain tied to explicit hardware lanes and evidence.
- The Responses server is a schema scaffold, not a production inference server.
- Distributed tensor, pipeline and expert parallel execution across CPU nodes is still future work.
The Next Constraint Is The Fleet
August should continue the same method: close the remaining Qwen3.6 long-context divergence, improve audio scheduling and corpus coverage, turn the server schema into a native execution design, and keep moving model-family behavior out of generic compiler branches.
The larger research direction is distributed CPU AI. If the planned hardware budget permits, the next fleet additions should be expandable Xeon nodes with enough PCIe and memory-channel headroom to test tensor, pipeline and eventually expert parallelism. The first goal is not to claim that a small cluster beats an accelerator system. It is to prove numerical equivalence, partitioning, communication, failure behavior and measured scaling on hardware that can be expanded one node and one memory channel at a time.
That transition will be gradual. The first distributed work should harden node discovery, reproducible placement, tensor and pipeline boundaries, KV-cache movement, communication traces, numerical replay across partitions and failure recovery. Additional CPU purchases only become useful when CKE can show which constraint each new node, memory channel or network link removes.
CKE ended the month supporting a wider range of model circuits, but the more important change is architectural. Model behavior is becoming explicit data. Kernel capabilities are becoming executable contracts. X-Ray is becoming the common surface for numerical and performance attribution. That makes the compiler more mechanical, the evidence easier to audit, and the next model less dependent on another pile of family-specific C branches.
Review the complete July history in the merged pull-request record, inspect the CKE documentation, or join the CKE Discord to test another CPU, model or numerical boundary.